Simulation for the Evaluation of Robustness of embedded Applications against Fault Injection – SERTIF

Nowadays embedded systems are pervasive, as they can be found in banks, health, biometric passports or smartphones. Therefore ensuring the security of those systems and their applications constitutes a critical requirement for maintaining functionality and data protection.
Specific designs and countermeasures are integrated by developers and manufacturers to enhance the resistance of their product against attacks.
The security level of the products are then tested and evaluated by experts. Regarding vulnerability analysis, those evaluations must match the current state of the art. The fault injection related state of the art require maximizing the exhaustiveness of the attacks analysis and the forthcoming multiple attacks---both spatial and temporal---will further complicate the analysis.

The objective of the SERTIF project is to rationalize and automate as much as possible the robustness assessment process of highly secure systems against fault injection, starting from the code analysis and ending with the physical realization of attacks, with the aim of taking into account multiple faults, which is presently a significant lock. To achieve this goal the SERTIF project will respond to the following challenges:

1) characterization of fault models truthful to physical attacks and implementation of those models in code analysis ;
2) definition of coverage criteria to ensure the completeness of a fault injection campaign with respect to security targets ;
3) aid to the development of secure application by analyzing the effectiveness and relevance of the countermeasures in code ;
4) transition to multiple faults attacks.

The techniques used will be low-level simulation, code mutation and more generally the combination of static and dynamic analysis on low-level code to handle the combinatorial explosion and to qualify the results of the vulnerability analysis against fault injection.

This project is based on the great complementary of the partners, who represent the various actors involved in the certification and
development process of embedded applications on secure components. Furthermore the partners are already independently developing their own tools for vulnerability analysis.

The Vérimag laboratory is the project leader and a well-known academic actor in the domain of embedded systems verification and validation.
Vérimag developed strong skills in the security field (protocol analysis, vulnerability detection in low-level code, security and certification of smart card applications).

The CESTI-LETI is an electronic component and embedded software ITSEF recognized by ANSSI in the context of the French Evaluation and Certification Scheme. The CESTI-LETI is a specialist for the most critical objects of the state of the art (smart cards, integrated circuits, banking applications, biometric passports, ...).

Morpho is a pioneer and market leader in the field of e-Documents like smartcards. Morpho develops secure products for telecommunications, health, identification, transport, pay TV and payment sectors. The Morpho's team working on this project is in charge of smartcard security.

Coordinators :
Project leader and coordinator for Vérimag: Marie-Laure Potet
Coordinator for CEA-LETI: Jessy Clédière
Coordinator for Morpho: Than-Ha Le

The project should result in a significant skills improvement for the involved partners and the research field, regarding techniques and methodology for the evaluation of the robustness of embedded applications against fault injection. Moreover, the SERTIF project aims to build a public benchmark of applications relevant to the field, specifically protected against fault injection. This benchmark will allow for public comparison of the analysis results and could constitute a step forward for the entire research field.