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In situ nanostructured Si-based superCAPacitors – ISICAP

Nanostructured Silicon-based Supercapacitors for Energy Storage

The ANR project ISICAP aims at exploring new concepts and developing new electrode architectures for integrated micro-supercapacitors.

Micro-supercapacitors for electrochemical energy storage

The development of integrated energy storage devices is a major challenge. Supercapacitors are a promising alternative to batteriesq due to their high power density and cycle life. However on-chip intergration of micro-supercapacitors is non trivial as the commonly used liquid electrolytes do not sustain the required conditions (a few minutes at 250°C). The ISICAP project aims at developping new supercapacitors made of nanostructured silicon electrodes and efficient solid electrolyte.

ISICAP will develop nanostructured silicon electrodes (nanowires or nanotrees) grown by a CVD process. The high specific surface of these electrodes will enhance the capacitance. The nanostructured silicon electrodes will be associated with new solid electrolytes combining good thermal properties and high ionic conductivity in order to build all-solid-state micro-supercapacitors.
The project relies on the know-how and expertise of the different partners in the following fields:
- CVD growth of doped silicon nanostructures
- (electro)chemical functionnalization and electrochemical characterization of electrodes and devices
- the fabrication of interdigited electrodes
- synthesis, characterization of specific electrolytes and their integration in micro-supercapacitor devices

Nanostructured electrodes (silicon nanowires and nanotrees) with optimized density, length and diameter have been fabricated and studied. The electrochemical stability is excellent and the operating voltage was extended up to 4V. Ongoing studies are focusing on new ionic liquids and solid electrolytes.

The market of CMOS integrated energy microsources represents a potential of several billions devices per year. The ISICAP ANR project will meet the need for solid micro-supercapacitors that can sustain the soder reflow process.

1. N. Berton, M. Brachet, F. Thissandier, J. Le Bideau, P. Gentile, G. Bidan, T. Brousse, S. Sadki Electrochem. Commun. 2014, 41, 31-34.
2. Thissandier, F. ; Gentile, P. ; Pauc, N. ; Brousse, T. ; Bidan, G. ; Sadki, S. Nano Energy 2014, 5, 20.
3. Thissandier, F. ; Dupré, L. ; Gentile, P. ; Brousse, T. ; Bidan, G. ; Buttard, D. ; Sadki, S. Electrochimica Acta 2014, 117, 159-163.
4. Thissandier, F. ; Pauc, N. ; Brousse, T. ; Gentile, P. ; Sadki, S. Nanoscale Research Letters 2013, 8, 38.
5. Fleur Thissandier, Pascal Gentile, Thierry Brousse, Gérard Bidan, Saïd Sadki. Journal of power sources, Accepted.

The ISICAP (In situ nanostructured Si-based Supercapacitors) project aims to establish new concepts and architectures for on-chip supercapacitors. The integration of energy “containers” near to the C-MOS layer is indeed a grand challenge today while energy is needed everywhere and at anytime to power most of the day life devices.

In this context, we propose to develop a new kind a nanostructured electrodes in the form of “branched silicon nanowires” in association with ionogels to demonstrate the operation of all solid state micro-supercapacitors compatible with current C-MOS microelectronics process (i.e. which can pass the solder reflow at 280°C for few minutes).

The large electrode surface area achievable with the “in situ” growth nanostructured electrodes as well as the high ionic conductivity and intrinsic thermal stability provided by the ionogels will allow high performances. The doped silicon nanotrees or nanowires electrode will have a capacitance above 28 mF/cm2 at 298K (measured in organic based electrolyte). The ionogel will have an ionic conductivity of ~5 mS/cm at 298K and a thermal stability up to 280°C. The assembled microdevice using a sandwich type configuration will have a capacitance of 14 mF/cm2 at 298K. Although it is difficult to give a value for the ESR (Equivalent Series Resistance) of the device, the time constant of the micro-supercapacitor must be less than 30s.
In the frame of this project, we will also propose an inter-digitized electrode array architecture elaborated on metallic substrate to prefigure integration on the C-MOC layer of the ISICAP micro-supercapacitors.

The project will be organized in 3 main scientific tasks, in addition to the project management task: Task 1: Silicon nanowires/nanotrees electrode fabrication, Task 2: Electrochemical performances evaluation of Si nanowires and nanotrees electrodes in view of supercapacitors applications, Task 3: Supercap testing and ionogel mounting.

To reach the projects goal, we have associated 4 partners with the complementary required expertises:

• Three academic partners:
Partner 1 (project leader), UJF/SPrAM at Grenoble, skills in electrochemical methodologies and surface grafting evaluation of the electrodes provided by Partner 2.
Partner 2, INAC/SP2M at Grenoble, able to produce nanotrees on Si and metallic substrate and to finely tune and dope Si nanostructures.
Partner 3, IMN at Nantes, skills in the design of new materials for the implementation of supercapacitors, more specifically solid electrolyte such as ionogel, as well as micro-device achievement and performance testing.
• One industrial partner: Solvionic S.A. (Partner 4) devoted to develop, and produce “tailor made” ionic liquids.

Project coordination

Said SADKI (Structures et Propriétés d'Architectures Moléculaires - Université Joseph Fourier Grenoble 1) – said.sadki@cea.fr

The author of this summary is the project coordinator, who is responsible for the content of this summary. The ANR declines any responsibility as for its contents.

Partner

Solvionic Solvionic
UJF-SPRAM Structures et Propriétés d'Architectures Moléculaires - Université Joseph Fourier Grenoble 1
IMN Institut des Matériaux Jean Rouxel
INAC/SP2M Institut Nanoscience et cryogénie

Help of the ANR 582,218 euros
Beginning and duration of the scientific project: January 2013 - 36 Months

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